C. Wei10:40
Thank you, Wendell. Good afternoon, everyone. First, let me start with our near-term demand outlook. We concluded our second quarter with a revenue of US 40.2 billion at the high end of our guidance in US dollar terms, driven by strong demand for our leading-edge process technologies. Moving into third quarter, we expect our business to be supported by continuous strong demand for our leading-edge process technologies, including the steep ramp of our 2-nanometer technology. Looking ahead, we observe consumer and the price-sensitive end market segment are being challenged due to the impact of rising component prices and macroeconomic uncertainties. As such, we are being prudent in our business planning while focusing on the fundamentals of our business to further strengthen our competitive position. Having said that, AI-related demand continues to be extremely robust. The AI mega trend continues to drive the need for more and more computation, which supports the robust demand for leading-edge silicon. Our customers and customers' customers who are mainly the cloud service providers, continue to provide us with their very strong signal and positive outlook. Thus, our conviction in the multi-year AI mega trend remains very high. Supported by our robust technology differentiation and a broad customer base, we now expect our full-year 2026 revenue growth to be slightly above 40% year-over-year in US dollar terms. Now, let me talk about the acceleration of authentic AI. The AI market continues to be very dynamic. The emergence of authentic AI is leading to a resurgence in the role of CPUs in AI data centers, which drives more silicon demand in addition to AI accelerators. We believe this is positive for TSMC as no matter what CPU approach is taken. Whether it is X86 or RISC-V architecture, they are almost all TSMC's customers. We are already collaborating closely with our CPU customers and working to support them with the most advanced technologies and necessary capacity so they can capture the gigantic AI market opportunities. Next, let me talk about TSMC's capacity expansion strategies. To address the structural increase in overall long-term semiconductor market demand profile, TSMC collaborates closely with our customers and our customers' customers to plan our capacity. Given the fundamental complexity of leading-edge technologies and the design-in and lead time involved, we also have a very good idea of their multi-year product roadmap and production plans. This is important because it takes more than 5 years to develop the technology and product, prepare the capacity, and ramp it up to high volume production. Internally, TSMC employs a disciplined capacity planning system to assess the market demand from both a top-down and bottom-up approach. This is a continuous and ongoing process. Based on our assessment, we are stepping up our CapEx investment to increase our capacity to support our customers' future growth. Now, with the strong collaboration and support from our leading US customers and the US federal, state, and city government, we would like to announce an additional $100 billion US investment in Arizona. This is to build several more semiconductor logical wafer fabs for 2-nanometer and 0 technologies, as well as advanced packaging fabs to support the strong multi-year demand from our leading US customers. We believe this investment will help to further foster the development of the US semiconductor ecosystem, strengthen the supply chain, and support an increasing number of high-tech, high-paying jobs in the United States. At the same time, we are building 13 leading-edge and advanced packaging fabs in Taiwan over the next several years, and we will continue to further invest in Taiwan. Therefore, TSMC's semiconductor technology and manufacturing will continue to play a pivotal role in supporting the global semiconductor industry while unleashing our customers' innovations. Now, let me talk about the current N3 capacity expansion. We are executing well on our global plan to add three additional 3-nanometer fabs, one in Taiwan, one in Arizona, and one in Japan to support the robust multi-year pipeline of demand for 3-nanometer technologies. In addition to all the new fabs, we continue to convert 5-nanometer tools to support 3-nanometer capacity in Taiwan. We are also leveraging our manufacturing excellence to drive greater productivity across our fab in all locations to generate more wafer output. We are also focusing on capacity optimization across nodes, which includes flexible capacity support among N7, N5, and N3 nodes. In summary, we are using multiple levers to do everything we can, wherever we can, however we can, to maximize the support to all our customers. Now, let me talk about our mature node strategies. TSMC's strategy at mature node has not changed. Our first priority is to fully support our customers. And we continue to increase, not decrease, our mature node capacity in the higher value-added segment. For example, we are increasing our mature node capacity through JASM Fab 1 in Japan for CMOS image sensor and ESMC in Germany for automotive and industrial applications. In today's market, outside of specific areas such as power management IC and CMOS image sensor, the mature node demand in other commodity areas is not that strong. Thus, TSMC will continue to focus on the higher value-added and strategic segment by ensuring we have the necessary capacity to support our customers' growth. Finally, let me talk about our A14 status. As I mentioned a few minutes ago, the complexity of leading-edge technology continues to increase. The lead time to develop a new technology such as A14, building the capacity and then ramping it up, now takes 5 to 7 years. There are no shortcuts. Our A14 technology represents the second generation of nanosheet transistors and delivers another full node stride from N2 with performance and power benefit to address the insatiable need for high performance and energy efficient computing. Compared with our N2, A14 will provide a 10 to 15% speed improvement at the same power or 25 to 30% power improvement at the same speed and close to 20% chip density gain. A14 technology development is on track and progressing well. Internal product like vehicle demonstrates close to 90% device performance and close to 90% 256 megapixel SRAM yield. We are observing a strong level of customer interest and engagement from both smartphone and HPC AI applications. And customer tape-out activity is ongoing and ahead of schedule. Production will start in 2027, and volume production is scheduled for 2028. With our strategy of continuous enhancement, we also introduced A13 and A12 as extensions of the A14 family. A13 represents a further advancement over A14, achieving an over 6% die area saving through an innovative 93 to 97% optical shrink. Through continuous design technology co-optimization, A13 also drives further performance and power efficiency improvement. A13 design rules are backward compatible with A14 to ensure smooth IP migration. We also introduced A12, which will bring our innovative super power rail technology to the A14 platform for superior performance, power, and area benefit. Both A13 and A12 are scheduled for volume production in 2029. We believe A14 and its derivative technologies will propel our A14 family to be an even larger and long-lasting node for TSMC than N2. Just like 2-nanometer technology is a larger and longer lasting node than 3-nanometer. And here we further extend our technology leadership position well into the future. This concludes our key messages and thank you for your attention.