Ben Tsai: Inspection and Metrology to Support the Quest for Perfection

Content of my talk I would talk about the different patenting technologies and how inspection methodologies are needed to support them. You're probably wondering why inspection metrology made it to the plenary session this year. It is growing in importance, but some of you might ask why bother with inspection and metrology at all. It's good to refresh that very quickly. For an advanced logic and foundry node, for example, the process steps without metrology inspection already exist at 600 steps, and with cycle times more than 120 days, that's four months. And of course, at the end you don't really know where to look for the problem and how to fix it. That is why inspection metrology is needed throughout a process. Today, inspection metrology is used in different parts of the semiconductor ecosystem. It is used not only in the front-end semiconductor fabs, but as we have heard earlier, also in the mask shop for manufacturers at the material suppliers, at the equipment manufacturers, and also in wafer packaging. I'll quickly go through the different lithography technologies which will get updates at this conference. The patent technologies that we will get updates at this conference. In the title I refer to photolithography for sub-7nm as a quest for perfection, just giving an idea that for an advanced GPU, there actually can be more than 1,000 process steps. And if each process step has an average yield of 99.5%, after those 1,000 steps the final yield is less than 1%. This gives you an idea of the level of perfection that is necessary. Therefore it's important to keep every material, every shop. This is a simplified view of the mask shop: you have the mask design data coming from the top and the mask blank coming from the left. As we heard earlier, usually the mask blank goes through an inspection, then it goes through mask writer and mask processing. After that you have pattern defect inspection, you also check for CD metrology as well as registration, and then we went through repair and cleaning for another pattern inspection and repair verification. Then the pellicle is put on and post-pellicle particle inspection. And sometimes, as the previous speaker said, registration is done to make sure that the pellicle frame does not distort the image.

For EUV with higher resolution and smaller resolutions, they also have smaller features to print. And with smaller features that means more shots from the mask writers, and more shots means longer writing time. More shots and long write times means there are more chances and more possibilities for imperfections on the mask. Imperfections refer to when the written pattern deviates from the design. However, for complex masks, not all of the imperfections print. For some of the masks, like IoT one, you can get millions of nuisance defects. So of course one can choose to inspect at a low resolution and only pick up so-called defects that print, but then you risk missing the small defects that have high MEEF factor, those that would actually print when the process window is tight. So the solution we came up with is an inspection with two passes. The first pass is a traditional high resolution inspection that identifies all the defect candidates. Then that is followed by changing the optics and introducing a wafer scanner printing mode simulation inspection mode. That second pass will pick up the printability of each of the defect candidates.

Next I'll talk about inspection metrology for the wafer fabs with a focus on the litho cell. When it comes to the litho cells, there are three areas of focus: material and tool quantification, process window discovery, and process window expansion and control. I'll start by talking about the materials and tool qualifications. Related to litho cells, there are a lot of materials and tools, all need to be qualified. I would use two examples: one is material qualifications in the litho cell, and one is tool qualification. Manufacturers, to the extent that it is possible, qualify as much as possible at the supplier themselves. So we are seeing that the material suppliers and the equipment manufacturers are adopting inspection metrology as well, so that when it goes into wafer fabs it's already at a very high level of confidence. Material qualifications: this is one example of one litho cycle from the spin-on of the material all the way to exposure, edge, and final analysis. You can see that after one cycle, it's always wise to inspect the pattern wafer to see if there are any problems. In this case, indeed one can find issues using unpatterned monitor wafers. By doing so, such a problem can be detected early on. Of course, when you detect it at the end, you can still detect it, but in most cases that is after 11 process steps or one day. And we talk about the state-of-the-art scanner that can print over 200 wafers per hour, and in 24 hours that's 4,800 wafers that are affected by the low yield before the problem is detected and fixed. So what we are seeing is that using monitor wafers to qualify materials and tools periodically is becoming a new approach.

This is the temperature profile that a product wafer will see. In this case, you can see the temperature profile as the wafer goes through pre-align, load, and also going through exposure. Interestingly, the yellow curve and the green curve are two different temperature profiles. By modifying or optimizing the temperature profile between the green and yellow curve, the overlay shift across the wafer can be significantly reduced. What we are seeing is, in addition to sensor wafers for the litho, there are also sensor wafers to optimize the edge chamber, to go into the edge chamber and optimize the temperature profile and distribution of an edge.

Process window boundaries are determined, then you do a root cause analysis to see what limits the process window and see if you can solve some of the problems and expand the process window. Once you have the process window to a satisfactory level, then you need to control it to maintain the process window.

Excuse me. So one technique that we see to be very effective in setting the process window is to systematically modulate the exposure condition of the scanner. We modulate on purpose the exposure condition of the scanner. As we know, the process window is determined by focus and dose. So we modulate focus and dose on purpose, then inspect them for defects. This process can sort of bring out the weak points, the hot spots with respect to focus and dose. Usually this is done by an optical inspector to inspect the whole wafer. Then you pick up the defect and analyze with SEM review. This is one example of how this is done. This methodology is sometimes referred to as process window qualification. Here on the wafer, the doses are modulated by three settings: dose one, dose two, dose three in three columns of dies. And along the vertical direction, the focus is systematically modulated. You can see that just on the graphics, very easy to see that setting number two seems to have the best process window, with the focus slightly biased toward the top. So this is a powerful methodology for very quickly seeing what the process windows are. With 193nm, overlay becomes very important. We're seeing a new trend where the overlay is systematically modulated to bring out overlay-related hot spots. In this case, layer 1B and layer 1C are systematically perturbed to bring out the overlay hot spots. In this particular case, this area was identified to be an overlay hot spot, then the process engineers can look into what the cause is.

Inspecting the resulting wafer is very important. I'm seeing the complementary use of optical and e-beam wafer inspections. Both have strengths and weaknesses. The technology today: electron beam inspection has very high resolution but very low throughput. Optical inspection does not have as high resolution but much faster throughput. Take 24 hours as an example: an e-beam inspection tool in 24 hours can inspect eight wafers, and you can see it inspect eight sites on eight spots on the wafer with a total area of 0.01% per wafer. An optical inspection tool can inspect 24 wafers in 24 hours, and it can cover 1% of the wafer area. So optical inspection is better for small systematic defects. Systematic defects here I refer to defects that repeat a lot. So even if you pick up a small area, you may be able to see it with high probability. There's another class of defect called voltage contrast defect, which is not as important for litho but it's important somewhere else in the process integration, because voltage contrast only e-beam tools can see it. However, when it comes to random defects, for example you do not know where it's going to happen, or wafer-level signatures where you see this kind of wafer-level signatures or wafer-to-wafer variation where even within the same lot there's wafer-to-wafer variations, and finally lot-to-lot variation where you see in different lots.

Looking at the optical tool versus the e-beam inspection tools, the chart started in 1995. Today the optical inspection tool data rate is about 24.8 gigapixels per second, and electron beam tool the data rate is 400 megapixels per second, a factor of 60 difference. The actual throughput difference is higher, much higher, because electron beam tools, to take advantage of the resolution, need to use very small pixel sizes. Not only that, but due to electrons being charged particles, due to space charge effect and shot noise, the actual inspection speed or data rate of a high-resolution e-beam tool is significantly slower than optical inspection tools. And on top of that, the optical tool will continue to increase in data rate.

Next I'll talk about process window expansion and control. As you can see, to control the process, a lot of inspection and metrology points are necessary. I will first highlight overlay metrology. For an advanced logic node 7nm, the product overlay specification could be as tight as 2nm. That is like 10 silicon atoms. And the metrology tool to measure the 2nm means the metrology tool needs to have a precision or total measurement uncertainty that is much tighter. This is addressed today by three different types of overlay technologies: there is the optical imaging-based overlay, there is scatterometry-based overlay, and there is SEM-based overlay. For litho R&D, there are frequent changes of film types and thickness. Imaging overlay is preferred because it does not require a precise model of the film. Once in production, depending on the layers, we found that the mix and match of imaging and scatterometry overlay seems to be most efficient. For memory makers, scatterometry overlay is more robust with respect to process variation. Imaging overlay and scatterometry overlay are both optical-based and they have higher throughput than SEM-based overlay. However, both imaging and scatterometry are measuring over the targets, and only SEM overlay measures the device itself. So we're seeing that SEM overlay is usually used frequently to calibrate, from time to time, the imaging and scatterometry overlay to the device-to-target correlation. When it comes to layer damage, SEM-based overlay, because of high energy, has more chance of damaging, and that's an advantage of the optical-based overlay.

Now going forward to the sub-10nm nodes, to deal with the process variation to become more robust, for the imaging overlay we found that the required advancements come from three areas: one is advancement in light sources, much brighter light source with higher signal-to-noise ratio; new optics with low aberration are necessary; polarization techniques, advanced techniques in polarization, are very useful for improving the performance; finally, new target designs with device-like segmentations can improve the correlation of the target to the device overlay. By doing all three improvements from generation to generation of imaging overlay, we see that total measurement uncertainty continues to come down, and we're seeing that.

We found that when the process varies from the previous layers or underlayer films, there can be errors. This is a graph where the vertical axis shows the underlayer effect, the potential underlayer effects in terms of impact on the measurement error, higher is bad, low is good. On the horizontal axis is the wavelength that I used to do the scatterometry overlay measurement. You can see that some wavelengths the error could be very high. The different color curves here show the different process conditions, all the possibilities within the process window, how it varies when the process enters manufacturing and varies over time. In this particular case, you can select a wavelength window where the measurement is robust. The measurement needs to be within that window to give you stable measurements. Today, the existing scatterometry tools do have multiple prefixed wavelengths, and sometimes there are cases where the prefixed wavelengths may not be exactly what you want. So what we are developing is a new tool based on a tunable laser that has continuously available wavelengths, so that for any process conditions one can set the measurement center wavelength and the bandwidth to be optimal and the most robust with respect to process variations.

We talk about overlay next, where you need to see imaging and also line edge roughness characterizations. However, for production process window expansion and control for the high-volume manufacturing where precisions and matching are really important, we see the optical tool has the advantage. For multiple patterning, not only CD but sidewall angles and many other critical parameters all need to be measured and controlled, and only optical CD will give you that because the CD-SEM is still limited to top-down measurements. For focus-dose control, where it is desirable to decouple the effect of focus and dose, measuring multiple parameters allows you to decouple that and be able to control focus and dose independently. For overlay again, we are measuring gratings, and the grating density could be high or low. Low-density gratings are used to simulate the isolated feature that you want to control. As you imagine, when you have an isolated feature, you tend to see more of the underlayers, and with the existing generation of scatterometry CD, when the density is low the errors tend to go up. What we found is that if we use more DUV light, if we enhance the DUV portion, we are less sensitive to the underlayers. Not only that, DUV is also more sensitive to the signals we want to see. So by enhancing the DUV with additional hardware, we can get better accuracy.

For process window expansion and control, there are actually some inconvenient truths. One is that wafers coming in have different shape variations, lot-to-lot variation, wafer-to-wafer variation, and some dies will fall out of the process window. In addition, the wafer processes are not uniform across the wafer, and the edge dies tend to fall out of process window sooner. I'll talk about inspection metrology to support these two areas. In terms of wafer incoming shape variability, today the traditional method to handle this is to use the scanner to pre-align and accommodate all the variations. Unfortunately, sometimes this slows down the scanner, and some wafers have variations so large that they cannot be fully corrected by the scanner, which can lead to low yield. What we are seeing is one alternative: instead of relying on the scanner to pre-align and fully accommodate all the variation, we introduce a wafer shape metrology before the litho cell. The wafer shape metrology first provides feedback to the previous process to correct some of the issues before going into the scanner. On top of that, it is also possible to feed forward the data to the scanner.

So if one could use another metrology step to not only improve the yield but improve the efficiency of the scanner, it can easily pay for itself. This is one example for the DRAM where by introducing the additional metrology step, the overlay variation was reduced by 35%, which can lead to higher yield. For edge dies, as you know, the edge dies tend to have lower yield and the yield tends to ramp up slower. Why is that? The reason is the edge die has a lot of issues that can affect it, simply because the edge die is across the edge of the wafer which is a discontinuity, and the edge die does not see as symmetrical process conditions. Having inspection metrology tools catered to inspect and do measurements on the edge is very useful. On top of that, we are seeing that in the case of optical metrology heading advanced, having advanced multi-zone correction algorithms could significantly improve the overlay at the edge and improve yield. With this, I will move on to inspection metrology support for EUV lithography. As we heard earlier, for EUV lithography the top four issues are EUV source, resist, mask pellicle, and mask defectivity. I'll touch on the pellicle.

For EUV mask blanks, today the majority are done by DUV inspection, even though we have started to see actinic blank inspection tools. DUV mask inspection tools are equipped with phase contrast optics that enhance their ability to find EUV phase defects. Even though the DUV tools are not inspecting at the EUV wavelength, they have high enough sensitivity to find defects such as phase defects, bump defects, and other critical defects. As we heard earlier, because EUV masks are used in a reflective mode, it is possible to hide some of the mask blank defects under the absorber. What this means is that high precision pellicle is needed. Pre-pellicle inspection: one after mask writing and mask processing, the other one is after repair and cleaning. Then there is a post-pellicle inspection that traditionally is to find particles, but for EUV, the pellicle is not a given and we'll touch on that later. Today, the EUV pattern reticle inspections are mostly also done by DUV optical inspection tools. Going forward, I see three options: one is to continue innovation in DUV optical technology. Optical technology will need new innovation to keep up with the shrinking defect size. The second option is e-beam, but e-beam is too slow. The third option is actinic inspection. For the initial high-volume manufacturing of EUV, which is forecasted to be within a year or two, we see that DUV reticle inspection will continue to be the workhorse. From a signal-to-noise ratio point of view, the e-beam tool would have higher resolution, but in order to have the high signal-to-noise ratio necessary, the e-beam tool has shot noise and we have to run very slow, which could lead to very high cost of inspection and take a long time. For high-volume manufacturing initially, I predict that you may not have the capacity to do extensive e-beam inspection. For EUV reticle inspection in high-volume manufacturing past the year 2020, we may have the additional options of multiple e-beam and actinic reticle inspection tools. A high-resolution actinic reticle inspection tool requires high NA optics with high magnification. The scanner has a magnification reduction ratio of 4, and for inspection you're talking about a magnification ratio of 500 to 1,000. So the magnification ratio is very different. Then you have a very high brightness source, ideally with high pulse rate, and to be able to find small defects you need a high-speed imaging sensor. EUV imaging sensors need to have high quantum efficiency and also be very robust with respect to EUV radiation. There will be so much radiation on the sensor that the sensor has to be really robust. Assuming that all this technology breakthrough is successful, then one has to deal with the maturity and cost of ownership. Maturity-wise, we know that the EUV scanner, being a new technology and a pioneer, has gone through three generations already and is not yet mature enough for high-volume manufacturing. One would hope that for actinic reticle inspection tool the same learning curve will be faster.

We heard from earlier talk that because optical lithography has had pellicles for more than 20 years, it is a very successful practice. So it's highly desirable to have EUV pellicles. However, a satisfactory material for EUV pellicles is not there yet. We have seen three options here as examples of pellicle materials, and we will hear more about them this week. Depending on the pellicle selection, these are the different inspection options. For pre-pellicle inspection, there are two high-inspection points in mask shops. All three technologies—DUV, e-beam, actinic—can be used for post-pellicle inspection. There is one inspection that is specific: if there are three different materials under consideration, all the pellicle materials block electron beam, so e-beam is not an option for post-pellicle inspection for all types. However, for DUV, two out of three types are actually transmissive enough that DUV can still be an option. Of course, actinic inspection sees through the pellicle and is an option for all pellicles. So DUV reticle inspection is an option except for one case where the EUV pellicle is non-removable and it's going to be a non-transmissive pellicle. In that case, only actinic tools can be used for post-pellicle inspection.

The downside is that the mask shop today typically does not have an EUV scanner, so you have to inspect in the fab. Once EUV reticles enter the fab and enter the EUV scanner, they could develop haze particles and so forth. It is wise or prudent to print monitor wafers from time to time and do a print check on the wafer. For EUV print check, again I'm seeing complementary use of e-beam inspection and optical inspection. E-beam inspection has very high sensitivity to small systematic defects. However, random defects and wafer-level signatures are becoming more important, and large-area coverage is needed to get a statistically valid conclusion. Only optical tools have that kind of throughput needed. This is one use case where e-beam and optical are used in a complementary way for print check. First you expose the wafer and do a full-wafer high-resolution optical inspection. From that, for example, the user selects 20 dies and 1,000 defects per die to understand where the issues are. Then three dies are further selected for e-beam full-die inspection. This is how it can be done. These print check applications are done on the wafer.

The optimal wavelength: for CMP we found the optimal wavelength is about 230 nm, and for edge small contacts the optimal wavelength is about 190 nm. What this means is that for an advanced optical tool, one would like to have not only high resolution but selectable wavelengths around 190 nm. Selectable wavelength optics at 190 nm did not exist before. When we try to develop one, we had to invent and explore a lot of designs. You can see a lot of designs have been done, very innovative—you could actually call them crazy designs. Finally we came out with the design in the center, which is manufacturable, and that is the tool we are introducing. You can see just by the extension of the wavelength difference, the size and complexity has gone up quite a bit.

So I've talked about inspection metrology support for EUV. I'll just quickly touch on emerging lithographies because I'm running out of time. For direct self-assembly, defectivity and overlay are important. For nano-imprint, again defectivity and overlay are important. For direct write, what's interesting is that because there is no reticle, die-to-wafer inspection will be necessary, but also the sampling mechanism and whole process monitoring will have to be established. Coming to the end of my talk, I talked about inspection metrology support for advanced patterning. I talked about imaging, scatterometry, and SEM-based overlay. There are optical and e-beam CD shape metrology. We talked about DUV, e-beam, and actinic EUV reticle inspection. We finally touched on optical and e-beam print check. The key is the optimal combination and use of different inspection and metrology tools—how you use them in the optimal way. Coming back to the title of my talk, 'Inspection and Metrology Support: The Quest for Perfection,' I believe we can achieve perfection by mastering the combination of imperfect pieces. Thank you.