Cadence CDNLive! Keynote speech Tom Beckley Part1

Thank you, Oliver. Thank you. Good morning. I'm Tom Beckley. I lead the R&D teams for custom IC for Virtuoso and for simulation Spectre. What I'd like to do is review some of the opportunities and mixed signal challenges we're looking at, some of the challenges that you face every day in your lives as you try to get designs out. Now, I kind of looked up mixed signal on Wikipedia and it says any place where you put analog circuitry and digital circuitry on a single die is mixed signal. Well, what semiconductor isn't mixed signal then? And in light of that, while that definition appears straightforward, the reality is that the methods people use to do mixed signal design vary a lot, including the verification and the implementation. I'd like to talk a little bit about that. Lipu already put up this slide, but what's clear to me is that these drivers of mobility, these drivers of video, the driver of social networking, they are really powering mixed signal design. Therefore applications must provide low power, high bandwidth, technology integration, and there's really no better example than Apple and the iPad and the iPhone. While I don't carry four devices myself, I can tell you I buy tons of them. I have six children, and believe me, Apple loves me. And no sooner do you buy the iPad then they want the iPhone, and it just doesn't end, right? Please don't show them that video about... you'll have to give me a raise. But you know, Apple's pretty interesting, and we see more people following that model where you have differentiated SoC design, package and board design, mechanical design, and manufacturing distribution all in this integrated supplier network that delivers a solution. All of us as semiconductor companies and as EDA suppliers provide the enablement for this industry to thrive. That was another point that Lipu made, and it's a very important one. But those mixed signal designs are not easy to do, so let's talk a little bit about that. If you took an iPad apart and looked at all the components, there's one thing I really like about it, and I tell my kids this every day, is that every supplier on there is a Virtuoso customer, including Apple. Every one of them. So I really like that part of it. They're all Cadence customers. The iPad I think is a good example of the state of the art of mixed signal design and some of the future direction where it's going. It's really the SoCs are a collection of small discretes and huge devices, linked with power supplies, linked with displays, and throughout the entire thing is lots and lots of software. Collectively that makes for great products. Now mixed signal design gets even trickier, and everybody in Europe knows this, since you've led mixed signal design and led in RF design. As RF content increases, smartphones and automotive are huge drivers for RF today, and streaming video demands more spectrum and RF mixed signal capabilities. In fact, over the next five years, we're expecting to see the bandwidth and a surge of almost 20-fold in terms of mobile data traffic. That's huge. With 4G and 5G, there's a trend for multiple radios to handle the throughput required. So what I'm going to do now is talk a little bit about some of the ways our customers, and some things we're working on, to verify these systems. Mixed signal is a big topic, we could go into a lot of areas, but let's talk a little bit about verification. Why did I choose verification? Because you chose verification. In fact, on the Technology on Tour late last year here in Europe, these were your responses to the survey. Based on over 500 responses, what came out on top as the largest methodology hurdle? Clearly verification. That's no surprise, we all know that. So whether one is designing a device that goes into an iPad or the iPad itself, it's very complicated to make sure the verification is sufficient so you don't have a problem when that product gets to market. The reason is that verification within analog is pretty well understood, verification within digital is pretty well understood, but when you intermingle analog and digital, it becomes much more challenging. In fact, it reminds me of Pittsburgh, Pennsylvania, where I live. We're known for having about 1200 bridges in the city. Some of those bridges are in pretty rough shape. Whenever I cross them, I think of that mixed signal bridge. They're often neglected and sometimes a little scary to cross. I think your design teams face the same challenge. Not surprisingly, everyone wants SPICE and fast SPICE to go faster, number one request. I'll talk a little more about that in a few minutes. That's because SPICE is the classic analog verification methodology. In fact, if we ask ourselves why did SPICE and fast SPICE unfold, it was really for analog verification and to address larger and larger circuits to understand their functionality, especially in light of the massive growth in parasitics that has unfolded. Now we are working feverishly on a next generation fast SPICE product. We're targeting large post-layout designs for higher performance and higher capacity, so more on that in just a few minutes. But as we all know, for a large complex design, SPICE in and of itself is not sufficient. Just look at what it takes to validate a product like this. You need to generate analog blocks in a digital context. You need to validate that the behavioral models account for the transistor level connections that have to be addressed. You can have all kinds of functional errors that can unfold: pin connection errors, inverted signals, bad logic, incorrect bus order, connections to the wrong power domain. All of these types of issues have to be addressed in verifying these types of designs. An analog performance simulation, as we all know, can only go so far. We have to use digital techniques to address it, and we have to use a hybrid of them in total. With multiple power domains, this becomes even trickier. Digital designers have to worry about the analog content, they have to understand it, and analog circuit designers now have to worry about the digital circuitry that surrounds their analog and the embedded software that controls their analog. So it's a much tougher process than before. Therefore analog and digital design tools must interact and be tightly integrated. So how does one approach complex mixed signal verification? The answer, and you all know it, there is no one answer. It depends on your design team's knowledge, on the overall product and system performance requirements, on the design itself, on the IP that's used, on modeling capabilities, and more. Our experience with many customers has shown that each company, and many times different groups even within the same company, use different approaches. At Cadence, we offer choices through all the main venues and possibilities of functional verification. This is clearly a digital-centric approach using long-standing digital verification methodologies. The analog or digital circuit designer creates a digital RTL that is good enough in terms of accuracy and coverage. The advantage is speed, and coupled with hardware emulation, you can get a lot processed in a short period of time. But what happens if your pure Verilog or VHDL digital model won't suffice for the analog? That's often the case. This method allows real-number modeling and the power of real-number modeling versus going to a SPICE solver. That's all available from Cadence. In effect, these are sampled waveforms of the analog output that you use as part of your verification methodology. But the truth is, at least for me, and I think for many of you, you like to work in your Virtuoso cockpit, you like to work in your custom design cockpit. You can still utilize real-number modeling and use those models for the simulation of AMS with AMS Designer inside of Virtuoso. That's a powerful way to go, available today and has been available for a while. But of course you need good models. We have been working in R&D to try to make it easier to write good models for you to utilize to represent the behavior of the analog output, so we can help you with your analog blocks and with your analog test benches, so you can utilize this kind of top-down approach. Cadence services and outside organizations can help. Many of you have good teams that can develop models, but all of you will say, how do you make those models scalable and portable across many designs? That's a challenge. But what if I want a bottoms-up approach, a schematic-driven approach? If you really need the deep accuracy again, you can use Cadence's fast SPICE solvers with AMS Designer. We have many customers that use a blend of both digital and analog solvers in their process. They'll keep their circuits through their critical paths all analog, and everything else digital in their process. So all of these are available today. I'll talk a little bit about some things we're doing to enhance this process.