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John Koeter
Senior Vice President of IP Group, Synopsys

Keynote: RISC-V: Unleashing the Next Phase of SoC Innovation - John Koeter, Synopsys

🎥 Nov 29, 2023 📺 RISC-V International ⏱ 17m 👁 309 views
Keynote: RISC-V: Unleashing the Next Phase of SoC Innovation - John Koeter, Senior Vice President of Product Management, ...
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About John Koeter

John Koeter, Senior Vice President of the IP Group at Synopsys, has been discussing the company's role in advancing RISC-V-based system-on-chip (SoC) innovation. In a September 2024 keynote, he announced a new family within Synopsys's ARC product line called "Cleverly ARC5," which includes three product families targeting deeply embedded 32-bit processors, real-time applications with hardware virtualization, and a full 64-bit multicore host processor supporting Linux. Koeter stated that Synopsys is committed to supporting the RISC-V ecosystem with a broad portfolio of IP, including interface IP, security processors, and safety-certified tools. He cited projections from Semico that automotive RISC-V-based processors will be valued at nearly one billion dollars by 2027, and noted that 30% of IoT devices are expected to be based on RISC-V by 2028. In a 2021 presentation, Koeter addressed trends in semiconductor design driven by shifts to public cloud computing and automotive zonal architectures. He said that according to Gartner Dataquest, about 90% of applications are currently run on on-prem clouds, but that is expected to flip to nearly 80% on public cloud within four to five years. Koeter described the current period as a "golden age of semiconductors," with high innovation levels driven by AI accelerators, graphics chips, and server chips. He highlighted Synopsys's investments in die-to-die interfaces, high-speed IP for data centers, and automotive-grade IP certified for standards like ISO 26262, and noted partnerships with Infineon, Qualcomm, and Bay Robotics.

Source: AI-verified profile updated from John Koeter's recent appearances. Browse all interviews →

Transcript (17 segments)
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John Koeter0:00
Thank you, it's just a great pleasure to be here on behalf of Synopsys. So as Kalista said, my name is John Koeter, I'm a Senior Vice President of Product Management at Synopsys, and I'm here to tell you how Synopsys and RISC-V are working together to really bring unique and innovative opportunities to you as you're designing chips and designing systems.
All right, so now changes are happening across many, many industries, and I'm just going to give you a few stats here. Did you know the amount of compute power is doubling every 100 days? Did you know that there are 1.8 billion gamers in the world? Did you know that AR/VR hardware is supposed to be 15 billion by 2017? Did you know that by 2030 there's supposed to be 300 million lines of code in an automotive? There are just gigantic changes, and semiconductors are at the heart of all of these changes. Just truly monumental changes going on in the industry. I'll have one more stat: did you know that it took 60 years for the semiconductor industry to go from zero to 500 billion? The forecast is by the end of the decade, in six short years, the semiconductor industry will double again. It'll be a trillion-dollar industry, and that's just absolutely amazing. You know, semiconductors are at the heart of that revolution, but certainly software is driving the differentiation. It's software-driven vehicles. Wherever you look, wherever you turn, having hardware optimized for the software workloads is just absolutely critical. And so with all this, we need to be productive and we need to be efficient, we need to embrace open standards, and we need to drive to unleash that next wave of innovation.
So I'm going to talk about some momentum that we're seeing in RISC-V. And you know, RISC-V has been going on for many, many years now, and I just want to focus on the last six months. Just six months, the progress has been amazing. You know, whether it's some leaders in here like Tenstorrent, or StarFive getting funding milestones, whether it's companies like Meta and Qualcomm announcing key initiatives around RISC-V, whether it's the Linux Foundation and RISE creating more open-source software, or whether it's a German JV with Infineon and Nordic and NXP and Bosch and Qualcomm all coming together to drive RISC-V into automotive. Just a really, really exciting time.
Just a few more stats here. 4,000 RISC-V members – that's amazing, that's up 25% basically in one year. And Kalista was telling me that the registrations were up about a similar amount, actually I think even higher. She said just this year, 111 chip companies have announced that they are doing RISC-V processors, 55 software companies are jumping on the bandwagon creating software for RISC-V, and more than 12 different industries are represented. I'll also call your attention to the graph today: the amount of CPUs shipping in SoCs containing CPUs is around 30 billion, anticipated to go north of 50 billion in the next few years. And as so much heterogeneous compute is being targeted across all these different industries, we really see the configurability and the expandability and the flexibility and the ecosystem of RISC-V generating a lot of momentum for the ISA and for people providing solutions based around it.
All right, so I just wanted to close out this particular section with two additional quotes. So Semico, a well-known research firm, is saying that in automotive it'll be a little under a billion dollars in 2027. And ABI Research is saying that 30% of all IoT devices will be based on RISC-V by 2028. These are just amazing stats. But you know what, we like to show this picture of the iceberg here because the ISA is the tip of the iceberg. What it really takes to have a successful processor implementation is a wide variety of other factors. You have to implement the ISA extremely efficiently, you have to have best-in-class software tool sets, you have to think about your simulators, you have to think about your prototyping models, you have to think about your test, you have to think about cybersecurity, you have to think about FuSa certification. There are many, many aspects that go into producing high-quality RISC-V processors above and beyond the open-source ISA.
So today, we actually just today announced a new family within our ARC product family. We call it cleverly ARC-V, right? This is an evolution of our ARC processors to include the RISC-V ISA in them. We're announcing today three separate product families: the RMX series. The RMX series is a 32-bit deeply embedded processor, a three or five-stage pipeline, it has optional DSP extensions, and it has a full FuSa hybrid mode for this. So that's the ARC RMX, really targeted on deeply embedded applications, very power and area efficient.
Now let's move on to the middle section, which is the ARC-V RHX series. This is still a 32-bit CPU family, but now it has a 10-stage pipeline, it's focused on real-time applications. For the first time ever in the ARC product family, it has hardware virtualization support, and you can cascade these to have up to 16 different cores. In addition to this, we have hardware accelerators that we can use to give you even more performance, and I'll talk more about those in just a minute. So that is the ARC-V RHX family.
The last member in the family is called the ARC-V RPX series. The ARC-V RPX series is a full 64-bit multicore host processor that supports user and supervisory modes. It offers cache coherency, it will run Linux applications, it interfaces to common buses like the AMBA CHI interface. So this is a true 64-bit processor that's really targeted at host applications. Some might say, 'Synopsys, are you going after the data center? Are you going after the mobile phone processors with this new ARC-V family?' And the answer is no. But there are plenty of applications that need a very power and area efficient host processor which is also configurable and also extendable, which is really at the heart of the entire ARC family philosophy. For those of you who don't know, we acquired ARC back in 2011 when we acquired Virage Logic. Actually, ARC as an ISA has been around for 25 years, so this is a very natural evolution. We are the second largest IP company on the planet.
I also wanted to say that in addition to these three new product families, of course we'll be continuing to support our existing ARC families. These processors stay in applications for sometimes decades. But there are two other family members within ARC: the ARC NPX, which is a neuroprocessor accelerator. I like to call it AI at the edge, very good for things like object detection. We also have a DSP which we call the VPX product line. That is a DSP built from the ground up, not for traditional DSP applications of audio, but designed from the ground up for data-intensive applications such as LiDAR and radar. So we have a broad portfolio of processors within the overall umbrella of ARC.
In addition to the processor family, we also have a tool that we call ASIP Designer that allows you to roll your own processor. In ASIP Designer, you describe the functionality of the processor that you want in a high-level programming language, and then the tool produces both the RTL for the processor as well as a tool chain. We have many customers who are using this. In fact, I think 50% of the usage for ASIP Designer is actually for designing custom RISC-V cores. We provide various templates that you can use to jumpstart and create your own highly efficient RISC-V core if you'd like.
All right, so I remember that old phrase: 'It's the software, right?' It really is about the software. The hardware is great and it's important and it's optimized for area and power and performance, but it's also about the software tool chain. I think one of the advantages that Synopsys brings as we get into RISC-V is that we bring a very proven software tool chain: the MetaWare tool chain. The MetaWare tool chain is actually even older than ARC, believe it or not. It's 40 years – just hit its 40th birthday this year. So this is a world-class, state-of-the-art development system with an IDE, with the runtime libraries, with the advanced debuggers, with cycle-based simulators, functional simulators, optimizing compiler, Simulink models. And all of it, the entire tool flow, is also FuSa certified.
We're also, as I mentioned, there is a new standard called ISO 21434, which is cybersecurity. Maybe some of you have heard of it. Our customers are really demanding that, particularly in automotive but also in many other different types of applications. So our ARC-V processors and the tool chain will all be certified against the 21434 standard, as well as FuSa certifications and ASIL D certifications.
Okay, so now let me talk about the broader Synopsys. We have solutions for RISC-V across all of Synopsys. For example, we have these things called Quick Kits, which are Fusion Quick Start Kits. These enable you to get out of the box and get great PPA from your RISC-V core, because we're working with all the RISC-V vendors, not just ARC-V, but we're working with SiFive and Andes and others to provide highly optimized implementation design flows. These are process-specific and they're tunable down to 2 nanometer.
I also want to highlight the tools that we have for early architectural exploration and software development. We have a tool called Platform Architect that allows you to model the workloads and make efficient implementation architecture choices to have the right and the best architecture. Along with that, we also have a tool called Virtualizer, which enables you to run software on a TLM version of your core. We're working with the entire ecosystem for RISC-V to enable that. These days nobody's going to push the button to tape out any SoC without running the software on it because pushing that button is unbelievably expensive, especially as you go to advanced process nodes. Synopsys has the highest capacity and fastest hardware-assisted software verification platforms. Specifically here I'm talking about ZeBu and I'm talking about HAPS.
Last but not least, we also have a very broad portfolio of IP that is optimized for use with RISC-V ISAs and processors like ARC-V. What do I mean by that? I mean interface IP like USB and Ethernet and high-speed Ethernet and die-to-die, those kinds of things. I mean security processors, hardware root of trust as an example, or crypto cores. I mean foundation IP, memories, and standard cells, OTP as another. We have a very broad portfolio of IP that we will be optimizing and working with not just our own cores but all the cores in the industry to put forth the very best solution possible to enable the RISC-V ecosystem.
I'd like to call your attention to two quotes that were part of our press release today. The first is from Thomas Boehm, who is a Senior Vice President at Infineon. He says, 'By developing safety-certified RISC-V-based processor IP, Synopsys is supporting us to expand the architecture to build high-performance automotive systems with the highest level of functional safety.' I'd also like to call out the quote here from Dan Mender at Green Hills, where Dan is saying, 'Green Hills is pleased to extend our production-focused family of safety-certified operating systems, compilers, and development tools to support Synopsys's new RISC-V-based ARC-V processor IP.'
So if I wrap this all up here today, it's really our great pleasure to be here and talk to you about how bright we think the future of RISC-V is and how we at Synopsys are standing behind RISC-V to make it successful in the industry across our whole portfolio of IP and tools and solutions here. Because you know what, SoC designers are looking for open-source solutions, for collaboration, and for flexibility. You saw the growth curves in the adoption of RISC-V and you saw the incredible, monumental changes that are happening in all of these market segments. So we at Synopsys are going to be there. We're going to be there to help you enable your next wave of SoC innovation based on the RISC-V ISA. And I'm also happy to announce that you can go have a drink on Synopsys. We're sponsoring the reception here, so please visit us in the exhibit hall and have a drink with us later. Myself and other colleagues from Synopsys will be all around the exhibit hall, and we look forward to answering any questions that you might have about how we're continuing to move the RISC-V ecosystem forward along with all the partners and the customers here in the room. So thank you very much.