CDNLive EMEA 2017: Tom Beckley’s keynote – “Drive On: Where are the Flying Automobiles?”

Good morning, good morning. Thank you all for coming. It's a pleasure to be back at CDNLive EMEA yet again. So I lead the custom IC, IC package, and PCB R&D teams at Cadence, about 1,100 engineers strong, doing lots of software development, being pushed very hard by the mixed-signal community and your expertise here in Europe, and we appreciate it very much. We appreciate your partnership with us. Now you might think this is a bit of an odd title for a CDNLive keynote, where the flying automobiles? It seems given all the talk today about the driverless car, it seems as though maybe tomorrow you'll walk out to your mobile living room on wheels, you'll get inside, and you'll say, 'Alexa, take me to Frankfurt.' You'll then relax or work or sleep or daydream, like some of you might be starting to do right now. But what you won't do is you won't get into that comfortable mobile room and say, 'OK Google, take me to San Francisco.' That will still be a flight. Now personally, I still like driving a car and being on the open road and having a powerful motor. How many of us enjoy that airport experience, maybe going through security and boarding the plane? And if you're fortunate enough to be on United, you can be exited off the plane. That wonderful cuisine. I just wonder, are we solving the right problem? Personally, be that as it may, there's little doubt, little doubt at all, that the integration of advanced electronics with complex software is changing industry after industry after industry, including automotive, IoT, and more. And all of this is made possible by the pioneers before us, the men and women before us who were willing to take that leap of faith, to look outside the box, to take the path less traveled, like William Shockley. Many of us know him, don't know him personally, thank goodness, but those of us that do, he invented the transistor in 1947 at Bell Labs, and he was surrounded by a number of very, very talented engineers. They left the lab, their Nobel Prize-winning mentor, in the late 50s and formed an iconic company called Fairchild. Now we know that Fairchild was acquired earlier this year by ON Semiconductor, and I do hope that name lives on in some way, shape, or form. But this prestigious group then dispersed yet again, and yet more companies were formed, right? Intel, National Semiconductor, Teledyne, AMD, and more all came out of this group. They have set the stage for you, for you to be the next Shockley 8, and that's what we'll talk about today a little bit. Now at this time, I was just a little tyke. This is the early 60s. I'll let you guess which of the Beckleys was me. Toys for Tots in those days were far less advanced, I can assure you that. But there's something prescient, I think, about the Etch A Sketch. Many of you probably recall it, right? It used sand and it used magnetics. Now in the early 60s, I can remember with my siblings watching that black-and-white cathode ray TV with lots of vacuum tubes in it, and there was a popular cartoon series called The Jetsons. Some of you may recall it. I don't know if it was popular in Europe or not, but in the early 60s, The Jetsons predicted smartwatches and robotics in the home and FaceTime and the ability to get information or news anyplace, anytime on flat-screen TVs and other devices, and to have online medical records and remote diagnoses and more with sensors and the like. And every episode included the personal flying vehicle. We got everything else here. Where's my flying car? That's your challenge, right? And I will posit to you that the step to the autonomous vehicle will be followed by yet another step. And what I'd like to do is talk to you about the tools and technologies that Cadence is enabling to help you change the world. I talked about the integration of complex software and advanced electronics. We've seen ways of computing combined on the mainstream side of the equation all the way into desktops and laptops and phones, cell phones, and then mobile phones, right? But it's just the tip of the iceberg. And so we'll see in a decade the number of units of IoT units that use that cell phone as a personal computing hub go up by 6X, from 4 billion to 24 billion units. That's stunning when you think about it. We'll see other areas transform as well. The combination of advanced node designed for CPUs and GPUs layered in with next-generation embedded flash and SRAM and 3D memory technologies is already starting to enable machine learning and deep learning and eventually cognitive learning. And there will see growth from the very, very small millions of units in industrial robotics, especially in consumer, into the billions of units. And for today's topics, of course, the driverless car. It seems from NXP, our guest speaker today, to Tesla and Nvidia, to Uber, so every semiconductor company and practically every software company sees opportunity in the driverless car. And here we'll see for semiconductor content alone an almost 4X increase. And of course we know that the number of units will be huge. So think about just this small subsection and what the opportunity is for your products in the future, for the systems and the products that will be created, for the software and more. From the cloud through the fog to the edge, we see system design enablement unchained, unfolding. And that's why Cadence is transforming ourselves to be more relevant for your world, where you have software and hardware teams working together. At the cloud level, we see silicon photonics for those high-speed communication links. We also see at the edge level ultra-low power devices, and those low-power devices will have to last for years and intermittently send information up into the fog and cloud. But at the same time, we see exceptionally high performance devices with embedded sensors and embedded memory that are very high power and are processing lots of data real-time while communicating with the cloud as well. For those types of SoC applications, we have Cadence's IP, we have our design platforms in Innovus and Virtuoso, for the packaging board we have Allegro, SiP, Layout, for PCB simulation and verification, and for system analysis we have tools like our hardware platforms Protium and Palladium, Jasper, Xcelium for digital simulation, Spectre AMS Designer, and then Sigrity for system level analysis and more. So Sanjay made a comment about the Virtuoso platform. I feel like I've inherited one of the iconic names in the industry for electronic design automation. As it turns out, when I was at Hera Semiconductor back in the early 80s, I actually worked on this platform, and because it was actually bought by Solomon Design Associates which then merged to become part of Cadence. God help you if any of my code is still in that product. I don't think it is. But the good news is that the number of people doing advanced node design is stunning to me. I can remember four or five years ago talking to the board of directors of Cadence and they said, 'Tom, you know, 22 nanometer FinFET is just unfolding. How many companies do you think maybe five years from now, which is about now, will be doing FinFET-based design?' And I said, 'Ah, a few dozen.' I was wrong. So in this platform for 20 and 16, 14 and 10, and now 7, more than 130 different companies, hundreds and hundreds of design teams, thousands and thousands of users. Why? Because the opportunities we talked about right there unfolding, and it's just the beginning of this journey pioneered by those guys before, the Shockley 8 and others, right? So we can handle all of the parasitics and the challenges. We don't do it in a vacuum. We work closely with foundries like TSMC. We work very closely with you who are pioneering technologies and methodologies to handle all the rules and multi-patterning until EUV can kick in. Last year we introduced a new family of analog design products: Virtuoso ADE Explorer, Assembler, and Verifier. Explorer and Assembler are optimized for single test bench and multi test bench design. They can handle the large amounts of data and parasitics and corners that you have to deal with at advanced node design, but also for very high performance and very highly tuned analog. Verifier is the first analog verification tool to come to the industry. We're really pleased about that. It can handle functional safety requirements and traceability for your analog to try to catch up with the digital side of the equation. When you combine it with Xcelium on the digital side and AMS Designer, you have a mixed-signal verification environment that's unfolding to kind of track your products. In a year, more than 100 companies are in various stages of deployment. It shows you what's unfolding and the opportunities that people see. In February of this year, my colleague Anirudh Devgan, he runs all of the digital R&D teams both for sign-off and verification and implementation at Cadence, he introduced a new digital simulator called Xcelium. The first thing he did was he optimized Incisive for single core performance, then he combined it with the Rocketick multi-core logic simulation capabilities, and together that new unified product can provide 5X or more performance improvement depending on the type of design. Last month at CDNLive Silicon Valley, Cadence introduced a new DRC system, Pegasus. Pegasus was built from the ground up over the last five years at Cadence. It's built on the cloud, it's built with a massively parallel architecture, it scales on hundreds and hundreds of CPUs upwards to a thousand or more. It's fully integrated with Virtuoso and Innovus both for interactive modes, and it reads PDBs. Now qualification at the foundries is underway at TSMC, GF, ICC, Samsung, and more. But think about doing a DRC turn in a matter of hours versus days or weeks, and what that means in terms of getting your product to market faster. Today there are two announcements. This is the first. I'm very, very pleased on behalf of Anirudh to make an announcement about our JasperGold formal verification platform. So the reality is that there's a lot of real estate available in advanced nodes, and so you are developing your own proprietary IP that you want to use on multiple chips, and so you want to make sure that that RTL is really high quality and that you can make it portable and robust, and you don't want to wait until you get to the implementation or the netlist stage in order to discern whether or not you have an issue. And so therefore we're bringing our JasperGold platform into the RTL sign-off world with two new apps: cross clock domain crossing and super lint. And it's been done in partnership with leaders here in Europe, ARM and ST, and we're very thankful for their support and their help on this. And the results are dramatic. So I strongly encourage you while you're at the show today to look into these new apps for RTL sign-off that we've just announced today. When you're designing a next-generation SoC or for that matter next generation product, it's all about how am I going to partition the software and the hardware, and then as both kind of get refined toward the end of the development cycle, how do I bring them together and make sure that they're working as a single unified product? And the long poles in the tent, we know it's software development and it's verification. Those are the two long poles in the tent. And so Cadence is working and continues to develop and innovate and invest strongly in hardware acceleration and in FPGA prototyping. We introduced a new platform last year, Protium S1, for your SoC hardware teams. Palladium Z1 is the industry leader. It's incredible the throughput of this machine for driver development as well as SoC development and maybe just to boot the system. But your software development teams have to move at a much faster pace. They need higher performance for the middleware, for the apps, for the operating systems. These two systems are congruent. They share a common environment, and so both teams working together on these hardware platforms can allow you to accelerate your product to market. The center of expertise and excellence for mixed-signal design has always been EMEA. It's always been Europe, driven by so many powerful companies. And you have forced us, I think, over a lot of years to get the OpenAccess database with Virtuoso and Innovus to work together for design, and of course for our digital and analog simulators to work together for simulation and verification. But that's not enough. And this new world is challenging us, especially in the world of automotive, to do things differently for mixed-signal design. So that includes, you know, an automotive product has a harsh environment, it has a long life, 10 to 20 years, and so reliability is key. And so we're working on new technologies like electrically aware design and RelXpert to extend that and to help you prove that it works. It's not just low-power devices, it's high current, it's voltage power devices for actuators, for motor control. And these require VoltaSFi and similar solutions which we're integrating into the mixed-signal solution to meet your needs for those desktop types of applications. Of course, advanced node Innovus and advanced node Virtuoso for high yield, for optimization, to ensure traceability and functional safety compliance. New tools like ADE Verifier integrated into the digital world. So I don't know how many device physicists are out there. I'm one. So all of us know that we have been chasing Moore's law for a long, long time. I started in 1981 in semis. We're down now in production at 7 nanometer, test chips now at 5 nanometer. We'll get to 3, we'll get to 2, we might get to 1. That's it, right? Just all you have to do is look at the fundamental atomic structure and you realize that CMOS is not going to scale beyond that. So then it's a question of multi-die, multi-technology, something very exotic, or 3D scaling, right? And it seems like most semiconductor companies today that are doing advanced node and most of their design teams are looking at these alternatives. Increasingly, wafer scale packaging is moving into the domain of the IC designer, both for design and for analysis. And that's why we're trying to merge and bring information from the package and board and system world as early as possible into the design cycle. You'll hear more announcements about this pretty soon. But for instance, inside the Virtuoso platform, we're pulling in DRC and LVS, we're pulling in Allegro and Sigrity technology. So while my chip is still open, I can actually import actual package parasitics and board parasitics, and I can understand whether or not that signal across all of those fabrics, chip, package, board, and system, will perform at the spec that I need. It's not just about the chip, it's about the product overall. Last year we introduced a companion technology already in this world at the floor planning and pathfinding level. So for instance, while I'm envisioning my product, I'm going to have to make some decisions. How am I going to optimally locate IO locations? How am I going to and which package variants will I choose for different types of designs or different types of products that I'm going to put out? How do I make sure that those signals and those high-speed buses from the chip across through the package, through the board, and into maybe the chassis will actually perform, and I can minimize the number of analysis requirements, crosstalk, and other problems that I might have? And that's what OrbitIO is about, allowing you to kind of draw that high-level floorplan and then use that floorplan to drive the detailed implementation into Innovus, Virtuoso, SiP Layout, and Allegro PCB. Incredibly successful within a year. Again, everything being driven by your needs to transform the world as we know it today. The same thing is happening on the RF side of the equation. Radios are everyplace, inductors are everyplace, and the designs that we see, whether it's at the chip, package, or board level, a lot of RFIC design is done in Virtuoso core, Spectre RF for simulation, and for packaging board, Allegro is very, very popular. We introduced a 3D EM electromagnetics tool last year from our Sigrity group. But we're not satisfied having it as sign-off. We want to move it as early in the design cycle as possible so you can minimize the impact of electromagnetics all the way through the chassis, ECU level. Wafer level packaging is incredible. I'm watching TSMC invest billions and billions of dollars in next-generation packaging technologies: CoWoS, InFO, WOW, way from wafer technologies. So the chip world as you know it is going from a planar world in a coplanar world into a 3D world. Of course, the package and the board have always been in that 3D world. And so you have choices now of how things are going to unfold. But what's absolutely key to this is that we can enable adaptive meshing and we can enable advanced modeling and that we can enable lots and lots of analysis, whether signal and power, EMI, our electrostatic discharge. The second half of this year, we'll announce a new product solution across chip, package, board, chassis, ECU for thermal analysis, driven entirely by the electronic side equation, ultra-fast and including computational fluid dynamics at the system level. So Cadence has benefited from a wonderful connections program and a great ecosystem that includes foundry relationships with Samsung and TSMC that have been outstanding, great partnerships with ARM. Those foundries and ARM use our tools to a significant extent. But that's not sufficient for your needs. And so for this expanded world of system design enablement, we're joining standards organizations and functional safety organizations. We're working with software companies and system design companies. We're investing in photonics and partnering with mechanical and more. On RF, last year we introduced a co-design flow inside Virtuoso for photonics design with electrical IC design. Of course, photonics is key to those server communication links between the chip to move all of that data. We're doing it in such a way that we're partnering with Luceda and Phoenix Software to develop this, and we're bringing the technologies of analog such that we don't have to live in a world for photonics design where it's kind of design, build, test, and then design again. We're introducing, just like we did in analog, schematic design hierarchy, linked logical and physical, simulation and more. And yet another very different example: in December of this year, we announced our first cloud product, OrCAD Capture, on the cloud, available on Arrow.com. Now I didn't say available on Cadence.com, I said Arrow.com. So why would we do that? Because all of your components are on large players like Arrow. And so if I'm an IoT maker any place across the globe, maybe coming out of the university, I'm going to design probably my first board, and I'm going to look at components, and I can go to Arrow.com and I can go into OrCAD Capture and I can look through millions and millions of components, data sheets, reference designs. I can check availability of products and cost. All of that is key to making sure that my next generation smart IoT product is available. This was featured at the Consumer Electronics Show in Eureka Park, which is the startup area, and it was featured with IBM Watson and it was featured with Indiegogo. Indiegogo is doing crowdfunding, right? People across the globe via the cloud investing in IoT makers any place on the globe. Within weeks, we had thousands of new users, right? This is important to you because these people will be your customers. They're becoming your customers. It's important to Cadence to understand the unfolding IoT maker world today. And my second major announcement, I'd like to talk about our partnership with MathWorks. So last year we introduced the linkage and integration of PSpice and Simulink at the board level, so for system-level simulation solutions for mixed-signal, IoT, and automotive applications being driven heavily out of Europe, frankly. Today we're announcing integration of MATLAB embedded inside of the new analog design environment to help link the system design world into the transistor design world. I'd like to invite my friend and colleague from MathWorks, Arun Veeramani, to come up and tell you a little bit about this.

Thank you, Arun. So Andy Grace runs kind of the Simulink area and Roy Larry runs the MATLAB area at MathWorks. And this has been, I think we've been working together two to three years to really form a partnership. Again, we see our world changing. We see this world of system design being so critical, and yet we can't do it all by ourselves. And so we're very serious about these partnerships, and it's great that our R&D teams are working together. In this last section of my talk, and it'll be pretty brief, I want to talk about the application of these tools, technologies, these new fabrics, and how it's changing and how it's pressuring the world of kind of the conventional automotive OEMs and suppliers and supply chain today. And I think Davide will actually talk about this as well, and with a lot more insight than I can provide. But these new fabrics are challenging. I can't tell you who, but I was at a large second-tier OEM recently who was doing some design at 350 nanometers, huge, right? Even incredible. And they were talking about making the leap to 16. That's an incredible leap to make, right? Why? Because they can no longer be in the old world. That was the term used by the person. 'We have to move out of the old world into the new world.' And so the pressure is increasing. So I started my career at General Motors actually, before I entered the semiconductor industry. I could only last about two years there, it was so painful back in the late 70s. Then we had a 10 to 12 year development cycle, and they were so excited when they could bring it down to seven years, right? But the people entering the automotive industry are coming with a consumer background and a consumer bent, and they look at a two-year development cycle as being too long, right? For a full product coming out, and that includes development of SoC, all of the firmware, the entire stack, the ecosystem that goes with it, that next generation consumer product. Now at the same time, the OEMs are demanding integrated ECUs and better ECUs, right? It used to be there was one ECU per major function in a vehicle. Not anymore. Now the ECU needs to handle safety systems and the infotainment and ADAS. And so that puts a lot of pressure on the analysis requirements and the data throughput, on the number of operating systems on that ECU that have to be done. The only way to get there is with new SoCs, with new system and packages, with new modules, and with new miniaturized rigid flex board applications. And of course, again, the same rule applies: verification and software development are the long poles in the tent. The good news is, if you're doing a next-generation SoC, you don't start from scratch. To use your own IP, you can pull in bleeding-edge IP like our Tensilica Extensa and Vision processors. These can be used for audio and for vision applications, for radar, lidar management applications. They're all built with functional safety in mind, including error management and isolation and memory and data protection, full documentation for ISO 26262 through ASIL. In fact, here in Germany last year, the combination of our DSP along with a convolutional neural network algorithm on a Xilinx FPGA set the benchmark in Germany for traffic sign recognition, better than a human. Now we've subsequently enhanced the Vision C5 DSP. It's ideal for CNN type applications. Again, a transformative application that applies more than just to the autonomous vehicle but is rolling out across the globe. I talked about the billions of dollars being invested by foundries now in advanced packaging. You can look at wire bonds on interposers, you can look at through silicon vias for stacked chips, you can look at up to 2.5D and 3D chip scale and wafer level stacking options for your design. The whole concept is maybe I don't need that board. Maybe I can have my CPU and my memory, or my GPU and my memory, and I can have embedded sensors, I can have embedded radios, and lots of software, all in a package. What does that do? On the power side of the equation, of course, the analysis side goes up at the same time. Cadence has been designing high-speed boards, both large and very, very small, for a long time using our Sigrity and our Allegro and OrCAD product lines. And you see how we're reaching out into that IoT maker community. You also see that we're reaching out and extending ourselves into the world of MathWorks for system design, and Arrow, and with great partnerships with PTC and Siemens and Autodesk and more on the PLM side and on the mechanical side, because the world of electronics and mechanical are coming together as well. If you think about the forward-facing camera module in a rear view mirror that's unfolding in a lot of advanced vehicles today, think about the thermal requirements for that. It's a very harsh environment. It's sitting up against the windshield. How are you going to dissipate the heat? You have the extreme heat in the summer, you have the frigid cold in the winter. Think about the expansion that happens to that module. Think about it having to last 10 to 20 years. These are the challenges that you face and companies face, but they will surmount them using advanced technologies and advanced techniques. Wireless is yet another new fabric just rocketing into the vehicle, right? And as 5G unfolds, it will rocket even faster. Of course, Bluetooth is there, and now people want to have full Wi-Fi capabilities in their vehicle. The cabling is going to make its way out of the vehicle over time. It's going to be drive by wireless, just like steering is done today. You won't even know it, but it'll happen. And Ethernet will be throughout the car. It needs to be secure, of course. But how are we going to get all of that data in and out of the vehicle for the driverless car, and hopefully the flying car in the future? It's going to be with silicon photonics. It'll apply in other areas like laser sources and optical connect and optical couplers and the like. That's how we're going to get 25 gigabits of data in and out of that car every hour, and it will probably double once the initial rollout happens. So I live in Pittsburgh, Pennsylvania, because as Sanjay said, my startup was out of Carnegie Mellon University back in the late 90s, acquired by Cadence. In Pittsburgh, of course, Carnegie Mellon's robotics labs, and Bill Gates made a nice multi-billion dollar investment into the software community there, so there's a Bill Gates building. And both those labs are working with a number of advanced companies on the autonomous car, just like in every major city with every leading university. So Google is there, Uber is there, Ford is there, General Motors is there. Some people I can't name are there. Google has more than a thousand people on this. Uber has 700 people on this in Pittsburgh. There are more than 80 Uber driverless vehicles on the streets of Pittsburgh for almost a year now. And I've ordered Ubers in Pittsburgh. You know, if you're going to get a driverless one or if you're going to get a driver one, right? If you get the driverless one, there are two occupants in addition to you, all right? There's a software engineer and there's a backup driver. And just ask them a question about what's going on, and you'll come to the conclusion that they're mute. They will tell you nothing. On the top of those vehicles is this large mechanical rotating beacon. It's a big lidar system, right? Lidar, so much better for recognition of objects than cameras or radar, right? That lidar system is in excess of $50,000 per vehicle. That is not sustainable. We know that, right? That's not going to be the driverless car, right? It's going to be a new fabric. It's going to go solid-state. You're probably working on it, right? It's going to drop by orders of magnitude in cost, and it's going to go up in terms of reliability by orders of magnitude, all because of new fabrics. Where it's going to be using MEMS mirrors on a custom IC, scanning thousands and thousands of data points per second with high precision and high reliability. And that's why we reached out a few years ago and did MEMS integration with Coventor inside Virtuoso, so you can do co-design again. The opportunities are not going to stop. They're just endless. So this is my concluding slide. Robert Frost was a famous American poet who penned these words more than a hundred years ago. If you had a school teacher for a mother who was into literature like my mother was, then you learned a lot of poems. This is one I learned: 'Two roads diverged in a wood, and I took the one less traveled by, and that has made all the difference.' So men and women like William Shockley and the Shockley 8, they have really ushered in the opportunities we have today. And for the next generation, you're going to usher in the opportunities to transform the world as we know it today and to lay the groundwork. But you can do that by looking outside the box, by taking that road less traveled. It may be less clear, it may have a little bit more risk, but I hope I've inspired you to think about next generation fabrics and how they may apply. And I do hope that in my lifetime, little Tommy may just get his flying car after all. Thank you so much. You've been a great audience.