Hey everybody, welcome back to Moscone West. We're here covering AMD's Advancing AI. This is their biggest show ever, to my knowledge. We're sort of tracking and reporting on the transformation of AMD from a chip company dominating as the number two competitor and now the biggest player in the CPU market worldwide, according to Lisa Su, but transforming into a systems company. Super excited to be here with Bob O'Donnell, my co-host. I'm Dave Vellante, and Prith Banerjee is here, multi-time Cube guest, senior vice president of innovation at Synopsys. Prith, great to see you again. Wonderful to reconnect after all these years.
Great to see you. Thank you so much for inviting me back to the Cube.
You bet. I wonder if you could take us through — people know Synopsys as the electronic design automation company, made a major acquisition of Ansys last year, $35 billion. Help us understand the relationship between the two companies. You came in from the Ansys side. Lay it out for us, if you would.
Absolutely. So, as you said, Synopsys was a leading electronic design automation and IP company, about a $6 billion revenue company — $4 billion in EDA and $2 billion in IP. When you look at a chip today, Dave and Bob, I mean, they are very complex things, with hundreds of billions of transistors in them, and that is what Synopsys builds. Now, increasingly these chips go inside systems — inside an automotive, inside a drone, inside an airplane. And so these systems are getting what we call intelligent systems. These are silicon-powered. There's a chip inside them. They are software-driven. So you have a software-defined vehicle, software-defined car, software-defined drone, and it's AI-enabled. So in the world of intelligent systems, you have to model the system, and you have to model the chip. So the leading system modeling company was Ansys. I used to be CTO at Ansys. We are a $3 billion company. We had the best fluid solvers, mechanical solvers, electromagnetic solvers, chip solvers, photonic solvers. So by acquiring Ansys, with the combination of Synopsys and Ansys now, the vision is to be the leading provider of silicon to systems for customers across the five verticals: automotive, aerospace, energy, industrials, and health care.
I mean, silicon design and manufacturing is now just so complex. You guys are a critical part of the supply chain. People so oftentimes don't think of software as part of the supply chain, but it's a vital instrument in terms of, you know, getting to market first, of course, US competitiveness, etc. So I wonder if you could discuss the evolution of that complexity, and how your portfolio sort of helps address that.
Yeah, so as I said, 20 years ago, when you bought a car, that car was all mechanically powered. So basically, you had mechanical steering, mechanical brakes, everything mechanical.
Yeah, we could all fix them ourselves.
Yeah, exactly. Open up the hood and start tinkering over there. About 100 million lines of code on that car, right? So this car that runs by itself, autonomous car, right? There's just so much complexity in those control algorithms. But the interesting thing about software-defined is you ship a car with the software on it, but then every six months you can do an over-the-air update of that software, and it becomes more intelligent with time, right? So the question is, this complexity — when it was just a mechanical car, it was easy to design, verify the thing, and once you shipped it, that car did not change. Now the car keeps changing, and you have to always verify the complexity of this thing. So the complexity has become — you have to let co-design of the software happen while the chip is being designed. It takes two years to design the next MI455. While that chip is being designed at AMD, the people who are writing the software on it are starting to write the software. And then that software will be the software to brake the car, right? So the braking of the car — the people who are actually making the brakes and the steering and so on at Ford or GM, they are making those mechanical parts, and you're simulating them with Ansys tools. So how do you co-design, concurrently design and simulate all of those things? That's the complexity. So with Synopsys today, what we can do is we can take 100 million lines of code that you run on a chip for which you have a very low-level description of the chip. That Verilog or VHDL description, you can emulate on our platform called Zebu and HAPS. So essentially, the software developers, they don't have the chip in front of them, they can start writing the software and emulating it on our HAPS and Zebu platform. Once they do this, then they start designing the chip. This is a 200 billion, 300 billion transistor chip that Lisa just explained for the MI485. You're doing this. That is being designed, and as part of it, we have the entire design flow from Fusion Compiler to do the design, PrimeTime to do the sign-offs and so on. But then, as this chip is going inside the car, all the car parts — the engine, the steering, etc. — are designed with the Ansys tools. So we can build a digital twin of that entire hardware-software combined thing before a single thing has been fabricated. That's amazing.
So then you can dramatically cut the time to tape out and time to market.
Well, and the other thing is just the complexity of designing a single chip has gotten to be, like you said, with that many billions of transistors, just overwhelming. So it's sort of one of the best applications you can imagine of applying AI to achieve a task, right? I mean, at the end of the day it's about AI helping people achieve a very difficult task. Well, there's hardly anything more difficult these days than, you know, designing a chip. You know, it used to be that rocket scientists were considered the leading edge, you know, smart people. Now it's chip designers, right?
I will tell you — I will date myself — but I started my career in academia. I used to be a professor at the University of Illinois and Northwestern. I used to teach students how to design VLSI chips. At that time, those chips had maybe 100,000 transistors. Using custom design. Then they went to a million times — 'Wow, it's a big deal.' Started at 10 nanometer, right? Or 16 nanometer, etc. Then they went to a million transistors, 10 million, 100 million, billion transistors. Wow, billion transistors. Then we went to 10 billion. We had 200 billion. Today, Lisa announced 300 billion. Cerebras was on stage. They have 2.7 trillion transistors. Can you imagine designing such a complex chip? And these chips used to be designed — maybe it took three years, four years to design. Now Lisa is talking about a chip every year. Soon she'll talk about a chip every six months. So what is happening is the complexity of these chips and systems is increasing, and the pace of innovation is getting shorter and shorter. A new car used to come out every seven years, then four years, then two years. How do you handle the complexity? You cannot have higher millions of engineers. That's where AI comes in. So what we have done at Synopsys is develop this technology of agent engineers. Lisa talked about agentic workflows, and so everybody is using it. We have embraced the concept of agentic AI workflows to take our tools — and the tools were being used by human engineers. Now, for every one of the tools, we have come up with AI agents: an agent to do RTL creation, an agent to do test bench assistant, and so on. And so these agents work with human engineers. They collaborate with the multi-agent workflows, and that is how we are enabling AMD and other chip companies to tame the complexity.
And you know, the other thing is I think a lot of people don't realize how much is involved in chip design. It's not just designing the chip, then it's verifying and testing and going through all the various steps that have to be taken. And you know, does this section communicate properly with this section? And all of those kinds of things. I mean, you know, as we move into chiplet designs, obviously that becomes increasingly important as well. So it's like, 'Hey, we've got this one chip and this other little chiplet piece. Now we have to make sure all the interconnect between all of them is as efficient as possible.' So there's just so many steps to that chip design process that I think most people don't really think about. And that's again part of what Synopsys is doing as well, is helping bridge all of those various gaps and fulfilling many different tasks.
And actually, I'm glad you mentioned that, because if you look at — I mean, Lisa mentioned this 300 million transistor chip using chiplet technology. What is a chiplet? These chips are so big, 300 million transistors. If you put them on a single die, there'll be so many failures in a chip you will not have a single die that will work. So therefore, they break it up into smaller and smaller chiplets, each having maybe 10 million transistors, 100 million transistors, right? And you take these chiplets and you assemble them together. Think of them as 3D chiplets or 3D ICs. Now, each of these chiplets, they will generate maybe 10 W, 100 W of power. So it's generating heat. Now, in the past you had only one chip. It was easy to cool that chip because we figured out how to do the cooling. Now you have chips that are on top of other chips on top of other chips. You have to figure out how to do thermal modeling of these chips. As the chips become hotter, you have expansion. So because of expansion you are having stress-strain, mechanical stress-strain, where you can crack. In order to prevent that, you have to do cooling. You have to do air cooling, water cooling, all the air-cool, water-cooling technologies that you hear from HP and so on, right? So this is where the Ansys tools came in, because we are the leading tool for thermal modeling, leading tool for structural modeling, leading tool for fluids modeling. So we can now do co-design of these 3D ICs and chiplets. The designs that came out — the 455 was done by our 3D IC compiler. By tying that compiler, these EDA tools, with the thermal analysis, stress analysis, fluids analysis, all that — this is what we call co-design. And I want you to understand a difference between over-design and co-design. When you are looking at a bridge, oftentimes people just put more concrete in it because they don't know at what point it may crack. You know what I'll do? A factor of five more concrete, just to be safe. If you put a factor of five more transistors, there'll be so much power. As it is, these data centers take 3 GW of power. It will go to 20 GW of power. You cannot over-design. So we at Synopsys are enabling our customers to do co-design, which is simultaneously doing the thermal with the electromagnetics, with the signal integrity, power integrity — just right to make it work.
The tolerances are so thin. It's funny, you're talking about the chiplets. I was having this conversation with Andrew Feldman a while ago, like, how do you get yields out of that big giant chip? And he explained how they, you know, make it redundant, but I want to ask —
Actually, our customer, so I can talk about who we work with.
Oh, okay. It's quite fascinating what they do, because I said, well, listen, there are trade-offs. I mean, how do you get high yields out of that? And so — well, so you guys work with them, and then of course they were up on stage today. But this co-design philosophy that you're talking about is so critical to the industry to keep pace. I mean, we saw Moore's Law start to, you know, tail off, and now co-design is how we get this annual cadence. Of course, AMD seems to have a different philosophy on co-design. We've been talking about this — than Nvidia. They kind of co-designed it in-house and put it out there, where AMD's doing it with the ecosystem. Different philosophies, different ways to skin the cat, as I say. But you know, in technology —
They brought Janardhan — Santos Janardhan from Meta — and they talked about when Meta is designing their 2028, the kind of data centers they'll do, they are saying, 'Oh, this is the kind of chip I need.' So they are co-designing from the data center to the chip. We are enabling AMD to do co-design of their chiplets with their things. So imagine a co-design — and literally with the kinds of tools that we have at Ansys, we can do the co-design with the data center also. So that's the part that we are saying: that in this world, we are allowing our designers from silicon to systems to data centers at scale to do what is called shift-left. Before designing a single chip, single system, single memory, whatever, we can do what-if scenarios with digital twins, with all the power and cooling and so on.
