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Austin Lyons
Co-host, Semi Doped; Founder of Chipstrat, Semi Doped

Synopsys’ Amazon Deal and GPT-Synopsys: Ravi Subramanian

📅 Oct 08, 2026 Semi Doped 42 MIN 1293 VIEWS 74 SEGMENTS · 2 SPEAKERS
The demand for workload-specific hardware is forcing a strategic shift in the semiconductor IP business. Synopsys's Ravi Subramanian joins Austin to discuss why the company is moving to a new royalty-based model for its custom "application optimized IP," starting with a billion-dollar deal with Amazon. Ravi also unpacks Synopsys's partnership with OpenAI and its vision for AI "agent engineers" that augment human designers, while explaining why physics-based simulation remains the ultimate ground truth. This episode is presented by Crusoe. Try Crusoe's managed inference for open models with $5...

What Austin Lyons said

Written from the verified transcript and checked against it. Every figure links to the moment it was said.

Ravi Sheth discussed Synopsys' multi-year, $1 billion-plus deal with Amazon for application-optimized IP, contrasting it with standards-based IP. He explained that application-optimized IP is customized for specific workloads, like ultra-low-latency PCIe for high-frequency trading or ad serving, and that Synopsys is introducing a royalty model for the first time in its IP business, alongside license and customization fees. Sheth also detailed Synopsys' AI strategy, including AgentEngineer for automating EDA tasks and the new GPT-Synopsys service with OpenAI, which offers a specialized frontier model for semiconductor design with compute and forward-deployed engineers. He emphasized the importance of physics-based ground truth in chip design, arguing that AI accelerates but does not replace deterministic engineering, and highlighted Synopsys' alignment of interest with customers to compress time-to-market.

Key takeaways

  1. Synopsys announced a multi-year, $1 billion-plus deal with Amazon for application-optimized IP, marking Synopsys' first royalty model in IP.
  2. Application-optimized IP involves customizing standards like PCIe, HBM, and UCIe for specific workloads, with customization fees tied to engineering resource prioritization.
  3. Synopsys' AgentEngineer uses task agents and super agents to automate EDA workflows, representing a shift from assistance to autonomy in chip design.
  4. GPT-Synopsys with OpenAI provides a specialized frontier model for semiconductor design, offered as a service with compute and forward-deployed engineers.
  5. Sheth argued 'in AI we believe, in physics we trust', where ground truth from physics ensures deterministic, non-hallucinating outcomes in chip design.

Numbers and commitments

FigureWhat it refers toTypeAt
$1 billion-plus Multi-year deal with Amazon for application-optimized IP commitment 2:51
18 months Time to bring chip generation to market timeline 19:23
12 months Target time to bring chip generation to market timeline 19:23
200x Growth in number of device equations from planar to CFET metric 40:41
44 days Time for Etched to get workload running after chip back metric 22:56
20 Number of verification AgentEngineers an engineer could check out metric 33:08

Chapters

  1. 0:00Amazon deal for application-optimized IP
  2. 4:46Business model for custom IP
  3. 9:53Differentiation in standards-based IP
  4. 14:45NRE and customization fees explained
  5. 17:28Royalty model and Arm analogy
  6. 23:40AI for EDA and AgentEngineer
  7. 34:32GPT-Synopsys with OpenAI
  8. 38:45Physics-based ground truth in chip design

Questions asked in this interview

8
  1. 6:40What things are in the digital world?
  2. 15:56So if you look at the whole spectrum, there's the IP, there's which foundry and process node it's available on, and then there's the, I'm going to say, kind of envelope for the standards compliance, right?
  3. 16:30You could say, well, hey, isn't that a Factory 2 because you have to do some customization?
  4. 19:23Do you have a team to support the bring-up of the IP at the customer?
  5. 26:50So how is this RTL going to translate into power, into performance, and into area?
  6. 33:08Can a verification engineer say, I'm going to check out 20 verification AgentEngineers today?
  7. 39:41LS-DYNA, a tool from Ansys, the number one crash simulator in the world. Why is it trusted?
  8. 40:41When we went from planar to FinFET, FinFET now all the way to gate-all-around, and then moving to CFET, what are the things?
Austin Lyons 0:10 ↗
Welcome everyone. I'm Austin Lyons from Chipstrat, and with me is Ravi Sheth, Chief Product Management Officer at Synopsys. So we are live here in New York City after Synopsys' Investor Day. And two big announcements yesterday: one was the announcement with Amazon for custom IP, and I think that was valued at over a billion dollars. And then the second one, and a surprising and interesting one, was the announcement about the OpenAI deal with GPT-Synopsys. So I want to get into both of those for our listeners, and I'm also going to just go deep into AI for EDA. So first of all, Ravi, thank you for being here with me this morning.
Ravi Sheth 0:48 ↗
Great to be here, Austin.
Austin Lyons 0:49 ↗
All right, so let's get into it. So, tell me and remind listeners who may not have seen Investor Day, what was the announcement with Amazon all about?
Ravi Sheth 0:57 ↗
Sure. The announcement with Amazon was about application-optimized IP, which is a key trend going on in the semiconductor industry. And if you look at how the building blocks for semiconductors, called semiconductor IP, have evolved, these are building blocks that allow customers to dramatically accelerate the time it takes to build their chip because they don't have to design these blocks. So typically at the beginning of a chip project, a team is thinking: what are they going to make themselves? What is core, and then what is context? What are they going to buy? Design IP is readily available off-the-shelf IP, and Synopsys is a leader in interface IP, which is the IP that connects cores, blocks to each other. Arm is a leader in processor IP.
So we're complementary in that way. For the better part of history, the IP business has been standards-based. You may be familiar with USB, PCIe, etc. And on your channel, I know you have a lot of great analysis on that. Standards-based means there's a standards committee. It's working to develop a standard with industry and commercial members, and then once the standard's ratified, people can build products to those standards, and you have an assurance of interoperability between those standards. What's been happening recently over the last five years is the rise of custom silicon is growing, and that's really first and foremost being driven by hyperscalers. And it's becoming customized primarily because workload-specific semiconductor design is becoming so important for them. For many of these companies, there's really only one or two applications that drive all the revenue and the profit in these companies. So it pays to optimize the full stack, rack to chip.
So in that context, application-optimized IP is IP that is optimized for the application in which the chip is living. So you may have a PCIe Gen 6, but you also may have an ultra-low-latency PCIe Gen 6 to get much, much faster time. For example, we're here in New York City for people who are doing high-frequency trading. It's a very, very desired customization. So application-optimized IP is something where you build once and you actually customize it, and that is optimized for a workload. This is what we announced with Amazon, which is a multi-year, $1 billion-plus deal to deliver application-optimized IP, which typically would mean from the system level they are driving the specifications which come down to the actual IP level. So it may be connecting CPU with AI accelerators to memory. So you may have heard all the standards that are on your channel: PCIe, HBM, LPDDR, UCIe, die-to-die, and Ethernet. And these are really the five key interface IPs, and that's what customization is all about.
Austin Lyons 4:10 ↗
Okay. Interesting. There's so much here. This is great. Okay. So first, let's start with IP. So, you know, I guess for anyone who's written software, it reminds me of like just taking a library off the shelf as opposed to, you know, to do some sort of function as opposed to rewriting everything by hand. I remember when I first started writing software, I was literally writing everything by hand. And then once I discovered that you could get software libraries where people had already built it for you, I was like, whoa, this is way faster. I could just take Lego blocks, put them together, and focus on essentially like the application logic. And so...
Ravi Sheth 4:44 ↗
That's exactly the analogy.
Austin Lyons 4:46 ↗
Perfect. Okay. So it sounds just like that for hardware. Now you talked about having standards-based IP, which would sort of be like, hey, I need these components to talk to each other, and there are standards bodies who define this communication in between blocks so that everyone's components are interoperable. And that's more of your traditional standards off-the-shelf IP. But then you're talking about here, say, making an AI data center with an XPU at the heart of it, and now you want these interfaces to be custom so that they can be extra optimized for that one particular workload that now we're running at gigascale. Right. Right. Okay, so a couple of questions that I have there. First, talk to me about the business model for standards-based IP versus custom IP, because obviously standards-based, and I think Synopsys called this Factory 1, build it once, sell it to hundreds of people. I can wrap my head around that. Now, the custom IP, that's, you know, build it once, but it's custom for that one customer. Of course, it's very huge customers like Amazon with Trainium, Graviton, and Nitro. But that clearly has to be a slightly different business model because you're only selling it to them. So how does it work?
Ravi Sheth 6:04 ↗
So in what we have with Amazon, first from a business model. So let's start with Factory 1 actually. That's where we have an NRE, non-recurring engineering work, and then the actual license fee for the use of that IP. In that case, standards committees take about almost three years to get to a standard. And the two things about a standard are: number one, achieve the functionality and performance required for that specific function. And then it doesn't actually say anything about how you implement it.
So that's where the engineer's creativity comes into how are we going to achieve a PCIe Gen 7 or Gen 8. What architectures are needed? What things are in the analog world? What things are in the digital world? And then what's the total power consumption, latency, etc. So a lot of everything about how it should be implemented is not in the standard. What's happening now and the rationale for application-optimized IP is there's no three years. People want to actually take some of these standards ideas and take a pre-ratified version of a standard and do some things to begin start using it earlier. So in that case, what we have is first a license fee, then we have a customization fee. And Synopsys explained yesterday, there's a very large scarcity of resources in the IP design world. And so from an engineering perspective and how we look at staffing, we have very specific slots. For example, we have eight engineering slots for UCIe or three engineering slots for PCIe. We have to prioritize those resources and to define, okay, what is the business opportunity we're going after. So that customization fee is really allocating that slot of engineers for these customizations for this customer. So that's why Synopsys called it a prioritization. So the customers, in terms of what they work with us, if you remember, there was a slide where Synopsys was saying what was the difference between 1 and 2. And in Factory 2, we actually begin with the system-level requirements. Those system-level requirements, as you go down through what does it mean for the chip and how it's communicating, translates into chip-level specifications, which are really the IP specifications. But some of the customizations would come around latency, throughput, how many picojoules per bit, and through a variety of different, I'm going to say, figures of merit that they want to target. It's still standards-based. It's not a complete, completely off-the-shelf non-standard, but it's taking the standards-based approach but really optimizing or customizing based on the workload that's running. A simple way to make this real is suppose you have ad server software that's running. The response time to serve an ad is a key figure of merit. Typically, as a chip designer, you may not think about that first, but now because of workload-specific requirements, your response time, you may recognize an image and then decide to serve up an ad based on an image. That latency completely determines how many ads you can serve across millions and millions of customers. That becomes a key driver for the latency in a PCIe, either a switch or an endpoint, etc. So, and then the third element of the business model is royalties. So this is really looking at how do we participate with our customer. We do the customization, but we look at the economics for the customer across license, customization fee, and royalty. And so this will be the first time Synopsys is actually driving to a royalty model. And with the agreement with Amazon and others we haven't mentioned, that's the direction for application-optimized IP.
Austin Lyons 9:53 ↗
Gotcha. Okay, that makes a lot of sense. This episode of Semi Doped is presented by Crusoe. Crusoe builds AI infrastructure from the ground up. Power data centers and the cloud on top. Crusoe Intelligence Foundry is their managed AI platform. And a nice feature in there is serverless inference. Now, if you're going, what in Jensen's name is that? It means that there are no GPUs for you to provision and no clusters to manage. You simply pay per token. If you're running open models like GLM, DeepSeek, Kimi, or Qwen, Crusoe's managed inference is fast. Nearly 10x faster time to first token and 5x the throughput of vLLM. Their memory alloy caching layer routes requests to maximize cache hits. Since it works with OpenAI SDK, switching over to Crusoe's API is quick and easy to get it running. All you have to do is pick a model, grab an API key, and start sending requests. If you sign up with the link in the show notes, you get $5 in free credits to try Crusoe Intelligence Foundry. Think of it, five whole bucks, so you can just burn some tokens just for fun. And some of these open models are quite inexpensive, so you'll actually have a ton of fun with it. Check out Crusoe and see their serverless inference on their managed AI platform. You really got to find out this for yourself. There are a whole lot of more features in this that I want to try out for myself, but serverless inference, I found, is the best place to get started. It's a great way to support the show and try out Crusoe's Intelligence Foundry. The link is in the show notes. And now back to the show. A lot of follow-up questions. There's so much goodness here. Okay. So first, one thought with the standards-based IP. My first thought was like, hey, if you're designing IP to a standard, it feels, I'm wondering how a person differentiates because there's a standard, and so it feels like anyone else could design to that standard. But what I heard you say was the standard defines how the interface should happen, how the communication should happen, but it doesn't touch on any of the implementation details. So even though there's a standard, you can still differentiate from other people making standards-based IP based on your implementation.
Ravi Sheth 12:07 ↗
Absolutely. And a standard specifies the protocols, the electrical interfaces. It doesn't specify how much power it should take.
Austin Lyons 12:17 ↗
It doesn't specify whether you should do equalization in the analog world or the digital world.
Ravi Sheth 12:23 ↗
And it doesn't specify the packaging that's needed.
Austin Lyons 12:28 ↗
How true.
Ravi Sheth 12:29 ↗
Right. And it doesn't specify anything about the system environment it's going to live in. So those are all opportunities to differentiate in that you can have the lowest power, lowest latency, you could have the smallest form factor, you could have a north-south very thin implementation of that IP so it could fit in a very particular way on a die, and so everything down to the actual shape of that IP is where you can differentiate.
Austin Lyons 12:57 ↗
Gotcha. That makes a lot of sense. Okay. So, and really what you're talking about is like which figures of merit are the most important when designing this IP, and even in the standards-based one. I'm wondering, do you have different implementations of a given standard? Like if someone comes to you and they have different requirements they're trying to fit it into.
Ravi Sheth 13:18 ↗
So definitely, and maybe some of the biggest areas have to do with having low power.
Austin Lyons 13:23 ↗
Sure. And what techniques are you using in your implementation to achieve low power?
Ravi Sheth 13:28 ↗
So the same PCIe Gen standard, two different IPs providing the same functionality but dramatically different power.
Austin Lyons 13:38 ↗
Sure.
Ravi Sheth 13:38 ↗
And today there's so much pressure on getting lower and lower picojoules per bit that's being pushed through. You see really creative implementations, and yeah, the best place to get a front-row seat at that is to go to ISSCC, the International Solid-State Circuits Conference, every February in San Francisco, where all the world's leading chip designers come in with their chips and they're showing how they achieved amazing figures of merit right from a key IP building block all the way to a full chip. And it's just amazing what creativity there is, but that is the innovation that's fueling circuit design today and continually understanding how do you harness what is possible in terms of energy consumption, what's possible in terms of data flow architectures and latency, how do you have your hardware and firmware-hardware interface to be able to have very fast reconfigurability of these IPs. A very, very rich source of engineering ideas and creativity.
Austin Lyons 14:34 ↗
Amazing. Cool. So when these two different IPs are designed, one is super low power and one's not, obviously the other one must be prioritizing something else, or there's a cost for that super low power.
Ravi Sheth 14:45 ↗
Exactly.
Austin Lyons 14:45 ↗
So there's a couple of different design tradeoffs that are made, and yet I'm sure you have like, you know, a certain portfolio, a few SKUs, but then it sounds like with the custom IP, the application-optimized IP, your partner, in this case, Amazon, is saying, hey, still those handful of off-the-shelf ones aren't quite perfect. We think we could take it farther, and you're starting at the highest level, probably like the rack scale or even the data center scale, thinking and deciding what is the figure of merit. Like as a product manager that's prioritizing, what is the figure of merit that's most important to us? It might be power, and what are tradeoffs we're willing to make? It might be cost or die area or something. So then that's coming all the way down, and then it's getting customized. Now you talked for the standards-based IP that there's a licensing fee and NRE. Which is that NRE, like does every customer pay the NRE, or is that kind of like a we designed it once cost that gets advertised, or what? Like, explain that NRE.
Ravi Sheth 15:49 ↗
So it depends on the nature of what the implementation is. There may be an IP that's not available at a certain foundry on a certain process node.
Austin Lyons 15:56 ↗
Ah.
Ravi Sheth 15:56 ↗
Right. So if you look at the whole spectrum, there's the IP, there's which foundry and process node it's available on, and then there's the, I'm going to say, kind of envelope for the standards compliance, right? And a good way to think about that is a PCIe standard. I know we keep talking about PCIe, but or a UCIe standard. Actually, we should start with UCIe. It's a standard that's not a standard.
Austin Lyons 16:24 ↗
That's what I've heard, in that every customer wants a different number of the ports.
Ravi Sheth 16:30 ↗
So there's some effectively NRE required. You need to be standards compliant. The standard really doesn't say that you can't have something with only two wires instead of six. So that's a type of NRE, right, that we'd have to do. You could say, well, hey, isn't that a Factory 2 because you have to do some customization? The way to think through this is once customization is really challenging our engineering scarcity, or the needs challenge our scarcity, we really need to look at how we allocate those pieces. UCIe complexity much smaller than PCIe or others. So there we have some engineering work we need to do, but typically you'll see the NREs associated with, well, we don't have it on this process technology, or they want it being able to talk to something else in addition to what there is. But those are things which we can advertise right across the whole opportunity for that IP on that node.
Austin Lyons 17:28 ↗
Sure. Sure. That makes sense. And then to the Factory 2, the application-optimized IP, you mentioned the customization fee, which, and you explained that nicely, it's more of the prioritization fee, and then of course the most exciting part, the royalties. Of course, this makes me think of Arm's business model, and you actually had mentioned Arm earlier where you were talking about interface IP and their processor IP. So yeah, tell me about the exciting opportunity there with the royalties. Because obviously with the licensing fee, you guys get paid upfront presumably for each like design start, but with the royalties, once the design actually gets manufactured, that's when you collect the royalty. So it feels like there's lots of upside, especially for a customer like Amazon who's deploying millions of training chips.

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APA

Lyons, A. (2026, October 8). Synopsys’ Amazon Deal and GPT-Synopsys: Ravi Subramanian [Interview transcript]. Semi Doped. CEOInterviews.AI. https://ceointerviews.ai/interview/3015933/

MLA

Austin Lyons. "Synopsys’ Amazon Deal and GPT-Synopsys: Ravi Subramanian." Semi Doped, 8 Oct. 2026. Transcript, CEOInterviews.AI, https://ceointerviews.ai/interview/3015933/.

BibTeX
@misc{lyons2026_3015933,
  author       = {Austin Lyons},
  title        = {Synopsys’ Amazon Deal and GPT-Synopsys: Ravi Subramanian},
  howpublished = {Interview transcript, Semi Doped. CEOInterviews.AI},
  year         = {2026},
  month        = {oct},
  url          = {https://ceointerviews.ai/interview/3015933/},
  note         = {Speaker-attributed transcript with timestamps}
}