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Patrick Gelsinger
Former Chief Executive Officer; Executive Chair, Gloo, Intel Corp

Pat Gelsinger & Elad Raz: Where Chips Go After the GPU Era | RAISE Summit 2026

📅 Jul 22, 2026 RAISE Summit 18 MIN 62 VIEWS 21 SEGMENTS · 3 SPEAKERS
Pat Gelsinger, Partner at Playground Global and former Intel CEO, and Elad Raz, CEO of NextSilicon, on the semiconductor landscape — what the last era looked like from the inside, and what's being built to replace it. Recorded live on the Grace Hopper Stage at the Carrousel du Louvre, Paris, on July 8, 2026. RAISE Summit is Europe's leading AI gathering, bringing together 9,000+ founders, executives, investors, researchers and policymakers. Learn more: https://www.raisesummit.com Subscribe for every session from RAISE Summit 2026.

What Patrick Gelsinger said

Written from the verified transcript and checked against it. Every figure links to the moment it was said.

Patrick Gelsinger, former Intel CEO, discussed the evolving balance between CPUs and GPUs in AI workloads. He noted that while the ratio once drifted toward one CPU per eight or sixteen GPUs, it has now shifted to one-to-two or even one-to-one, benefiting Intel. He argued that CPUs are about workload, not architecture, and that specialized processors (like floating-point or media processors) eventually get absorbed into general-purpose architectures. He predicted that startups will bet on non-transformer architectures because training a 10 trillion parameter model requires about $3 billion in capital, which is prohibitive for new entrants. Gelsinger praised Next Silicon's flexible, software-driven architecture, noting that it addresses training, inferencing, and future algorithmic development. He forecasted that models will move from 2D to 3D and 4D, that the boundary between training and inferencing will decay, and that AI must become 10,000 times better in efficiency. He emphasized that the next decade will bring dramatic changes in computing, including cryogenic technologies.

Key takeaways

  1. CPU-to-GPU ratio in AI workloads has shifted from 1:16 to 1:2 or even 1:1, benefiting Intel.
  2. Training a 10 trillion parameter model requires about $3 billion in capital, pushing startups toward non-transformer architectures.
  3. AI must become 10,000 times better in energy and capital efficiency to realize its full potential.
  4. Models will evolve from 2D to 3D and 4D, enabling physical AI applications.

Numbers and commitments

FigureWhat it refers toTypeAt
1:16 CPU to GPU ratio in AI workloads previously metric 2:38
1:2 Current CPU to GPU ratio in AI workloads metric 2:38
10 trillion Parameter count of a large AI model metric 8:19
$3 billion Capital needed to train a 10 trillion parameter model commitment 8:19
10,000x Required improvement in AI efficiency commitment 14:42

Chapters

  1. 0:00CPU and GPU balance in AI
  2. 6:15Specialized vs. general-purpose architectures
  3. 8:19Startup challenges and non-transformer models
  4. 9:26Next Silicon's flexible architecture
  5. 14:42Future of AI models and hardware

Questions asked in this interview

5
  1. 2:28So how do you see the CPU play in the world of AI?
  2. 4:28And I mean, have you seen any in the history in the past eight years since the volume any architecture that says let's accelerate one thing and one thing alone and it was successful?
  3. 7:10And obviously, we're now in what, year seven of transformer?
  4. 14:36So what do you think the future will bring?
  5. 17:49Most of it by software developers, okay?
Host 0:04 ↗
So, we're at an AI conference and you're an HPC guy. So, what are you doing here? Right? Did you get the wrong directions, the wrong conference? What's up?
Co-Panelist 0:19 ↗
True. Well, I started Next Silicon eight years ago and we went after supercomputing, running physical simulation, fluid dynamics, everything that is nuclear related, security, defense, and those things. And now there is AI, and AI is all you get. Yeah, that's the sexy new one. No one cares about HPC, but in the foundation level.
Host 0:43 ↗
Even though that's the route that Jensen and all of GPUs followed as well.
Co-Panelist 0:50 ↗
So that's the point. I mean, even GPUs obviously started with graphics, but then they moved to supercomputing with the big machine running up, and HPC and AI in the foundation are exactly the same mathematical principle, and even AI workloads are way simpler. So we have tackled the hardest problem about running HPC code, which is more complicated. You have so many different kernels, so many different simulations that you need to run, and from there going to AI is kind of a simple one. Let me give you an example. When we designed our chip, we had the Maverick chip. That's the name of our accelerator. We had a data flow that can crunch the parallel section of the code. But in HPC, you have a lot of serial code. So instead of going to the CPU side, we built our own CPU. We have built our own RISC-V chip inside the chip to accelerate those workloads. So it's kind of entangled together. And the point I want to say is that yes, we are in HPC and we can rock in AI and machine learning acceleration, tackling the big thinking model, the agentic one, open source models like GLM, Kimi, Qwen. And speaking of CPUs, I mean, you had a vision a long time ago when the entire world thought to itself, well, GPUs are going to take everything.
Host 2:28 ↗
Yep. Yeah.
Co-Panelist 2:28 ↗
And we are obviously doing our own CPU, but we are seeing that things change now. So how do you see the CPU play in the world of AI?
Patrick Gelsinger 2:38 ↗
Well, having only done 14 generations of microprocessors all the way back to the 286, 386, 486 where I cut my teeth. I've been a CPU guy a long time. A couple of years ago, I was having this interesting conversation with Jensen about the CPU to GPU ratio. Okay, we still need some CPUs, but it's like one CPU and eight GPUs, one CPU and 16 GPUs. It was like, what is that balance of compute requirements across the two? And it was always drifting in that direction even though I never believed that would be the case. CPUs are about the workload, not about the architecture. How do you run the workload? And now as we've seen with the Gent multimodel environments, there's a whole lot more affinity toward the CPU portion of the workload. Now people instead of 1 to 16, it's 1:2 or even in some cases one. So the CPU is sexy again. And for a CPU guy forever, we're like, okay, that's pretty good. That's been a meaningful benefit to Intel over the recent period where there was a lot more demand for that balance between CPU and GPU to be much more one-to-two. And obviously, since I've been a CPU guy forever, I'm happy about that. But it's about the workload. It's never about the underlying architecture. It's how do you execute the workload? The software is on top, the hardware is underneath. And how do you think about that, Eli? The balance between those two, and what are you doing to make it easier to address them both?
Co-Panelist 4:28 ↗
So I mean we have seen recently a trend that people say well let's build a custom ASIC, let's build a chip that can do only one thing. I mean today the current big models, the big LLMs are obviously transformers, so okay, let's build a chip that can run Llama. That was like a thinking. But we are seeing innovation moving forward. We are seeing a lot of envelopes around the attention heads, multi-latent attention, sparse attention, and those computations keep changing. And what you need, as you say about the software and hardware, you need to have a flexible hardware. You need a general purpose type of hardware that you can throw anything on it. Whatever kernel, FFT. Yeah. I mean sometimes like Mamba models, you need to work on it in the frequency space and not... And with us, what we have done, that's the biggest plus of Next Silicon: the fact that we have built our architecture from day one to be software driven, to have the ability to take whatever code section that you want, understand them, place them on a data flow for the acceleration, and the serial code on the CPU, on the RISC-V CPU. That was day one, and this is future proof. I mean, whatever model will come next, it's something that we can accelerate. And I mean, have you seen any in the history in the past eight years since the volume any architecture that says let's accelerate one thing and one thing alone and it was successful?
Patrick Gelsinger 6:15 ↗
Yeah, and you know, generally you see the special purpose things emerge, right? There's a period of time where they're interesting, and you go all the way back to like floating-point processors, if we could be so mundane, where they were specialized, or media processors and specialized, but eventually they're just absorbed into the architecture of the machine because the workloads continue to evolve over time. And I mean, look at some of the conversations today. We have a training farm, but that's different than the pre-... you know, the G code, and it's different than the prefill, right? So we're taking the same workload and carving it up into more specialization, right? For it, that's not a scalable architecture, right? You end up with these islands of compute over time at scale, and fundamentally the workloads continue to evolve.
Co-Panelist 7:10 ↗
Absolutely. I mean, training is a workload that is kind of different because you can batch a lot of things together, but now everyone wants to talk about prefill. This is decode in the inference side, because prefill is very similar to training, and the decode you have the serial part that calls attention that is kind of serial, and they say okay, we need something else that is more memory bound. But I mean, here Yann LeCun always pitching the model should keep learning like us humans that keep learning. Yeah, it really is pretty, you know, to say that we have training and then inferencing. Inferencing is becoming decode and prefill, right? It's like, no, I want models that are constantly training, learning, becoming more customized into environments. So there shouldn't be that separation in workload. And obviously, we're now in what, year seven of transformer? There will be things beyond it as well. And we need architectures that accommodate those evolving algorithmic spaces and new models over time.

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Cite this transcript

APA, MLA, BibTeX
APA

Gelsinger, P. (2026, July 22). Pat Gelsinger & Elad Raz: Where Chips Go After the GPU Era | RAISE Summit 2026 [Interview transcript]. RAISE Summit. CEOInterviews.AI. https://ceointerviews.ai/interview/1137665/

MLA

Patrick Gelsinger. "Pat Gelsinger & Elad Raz: Where Chips Go After the GPU Era | RAISE Summit 2026." RAISE Summit, 22 Jul. 2026. Transcript, CEOInterviews.AI, https://ceointerviews.ai/interview/1137665/.

BibTeX
@misc{gelsinger2026_1137665,
  author       = {Patrick Gelsinger},
  title        = {Pat Gelsinger \& Elad Raz: Where Chips Go After the GPU Era | RAISE Summit 2026},
  howpublished = {Interview transcript, RAISE Summit. CEOInterviews.AI},
  year         = {2026},
  month        = {jul},
  url          = {https://ceointerviews.ai/interview/1137665/},
  note         = {Speaker-attributed transcript with timestamps}
}